//Copyright (C)2014-2025 GOWIN Semiconductor Corporation.
//All rights reserved.
//File Title: Timing Constraints file
//Tool Version: V1.9.10.03 (64-bit) 
//Created Time: 2025-04-19 12:54:47
create_clock -name fpga_clk_in -period 20 -waveform {0 10} [get_ports {clk50mhz}]
create_clock -name usb_clk -period 16.667 -waveform {0 8.334} [get_nets {clk60mhz}]
create_clock -name audio_clk -period 325.521 -waveform {0 162.761} [get_nets {audio_clk}]
set_clock_groups -asynchronous -group [get_clocks {usb_clk}] -group [get_clocks {audio_clk}]
